Senior Engineer II - Digital Design

Contenu de l'offre Senior Engineer II - Digital Design chez Microchip Technology

Senior Engineer II - Digital Design

At Microchip, we work every day to innovate and develop products that solve our customers’ technology challenges. Our team of more than 20,000 people worldwide is dedicated to delivering on the promise of working together to improve lives.

Learn about our guiding values that are the building blocks and foundation of our culture and discover how we make a positive impact in the communities in which we operate. We believe our culture fosters trust, collaboration and belonging.

Our people serve the industrial, computing, automotive, communications, aerospace and defense, and consumer market segments. As part of our global team, you can build technology solutions in our six growth areas – 5G, data centers, autonomous driving, the Internet of Things, electric vehicles, and artificial intelligence and machine learning.

Around the world, we are committed every day to recruiting, retaining and promoting people in our diverse workforce. Your perspective, passion and ingenuity will contribute to achieving more as we fulfill our mission as a leading provider of smart, connected and secure embedded control solutions.

Join our community of exceptional people doing incredible things.

Job Description:

Senior Design Engineer in CIPG group to design and develop various digital IP modules for use in advanced 32-bit microcontroller and microprocessor product families
Job Responsibilities:

Design and implement various digital IP in RTL using System Verilog

Work with Architecture teams to review IP specifications and objectives. Provide feedback on design feasibility and implementation complexity

Generate and maintain Micro Architecture Specification (MAS) and other design flow documentation

Develop and enhance scripts to automate relevant parts of the design process

Provide guidance and support to the verification activities of other team members

Support the integration of IP modules into SoC products

Support debug of post-silicon issues with Validation, Applications and Test teams

Provide support for synthesis, STA and power analysis

Contribute to continuous improvement of our design flows and methodologies, implementing industry-leading solutions for our global team

Requirements/Qualifications:

Must be able to write reusable System Verilog RTL code, follow design guidelines and best practices

Able to write clear and concise documentation for micro-architecture specification (MAS) and design flows/methodologies

Expertise in Verilog/System Verilog, Python, TCL and industry-standard EDA tools

Expertise in design quality checks such as Lint, CDC, formal equivalency

Strong analytical, and problem-solving skills, as well as hands-on debugging skills

Able to define Design process documentation, flows and methodologies

Excellent communication skills. Comfortable presenting in technical forums

Knowledge of AXI/AHB interfaces/protocols required.

Experience with low power design techniques highly desirable.

Understanding of Flash / non-volatile memory-based architectures a plus.

Understanding of communication protocols such as Ethernet, I3C, MIPI desirable.

Familiarity with UVM and assertion-based verification desirable

Familiarity with Emulation / FPGA a plus.

Knowledge of Functional Safety standards and associated hardware diagnostics a plus.

Experience in analog and mixed signal design a plus (e.g. ADCs, DACs, OPAMPS).

Must be able to function in a fast-paced engineering environment that is simultaneously responsible for new IP design and addressing bugs/weaknesses in existing solutions.

Must be a team player. Must be able to work effectively within a global team.

+ 6.5  years of industry experience

#LI-ML1

Travel Time:

0% - 25%

Summary

Location: France - Rousset

Type: Full time